1. Field of the Invention
This invention relates to architecture for complex array processors made up of great numbers of interconnected relatively simple processing elements, and more particularly relates to an architecture for an array processor in which architecture significant multidirectional connectivity is implemented by providing each processing element with X,Y mesh connections but very limited diagonal or Z connections, and having controls which arrange the connectivity hardware so that data may "hop" from sending processing element to selected receiving processing element, which may be adjacent or remote, using the X,Y mesh connections in elemental hops without crossovers or vias.
2. Description of the Prior Art
The following patents and general publications are representative of the prior art: